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87
J. Kim and S. Lee. "Fast Design Space Exploration for Always-On Neural Networks," Electronics, 2024.
J. Kim and S. Lee. "Fast Design Space Exploration for Always-On Neural Networks," Electronics, 2024.
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86
J. Kim and S. Lee. "An Efficient Checkpoint Strategy for Federated Learning on Heterogeneous Fault-Prone Nodes," Electronics, 2024.
J. Kim and S. Lee. "An Efficient Checkpoint Strategy for Federated Learning on Heterogeneous Fault-Prone Nodes," Electronics, 2024.
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85
Y. Heo and S. Lee. "Supervised Contrastive Learning for Voice Activity Detection," Electronics, 2023.
Y. Heo and S. Lee. "Supervised Contrastive Learning for Voice Activity Detection," Electronics, 2023.
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84
Y. Heo and S. Lee, "Knowledge Distillation for Image Signal Processing Using Only the Generator Portion of a GAN," Electronics, 2022.
Y. Heo and S. Lee, "Knowledge Distillation for Image Signal Processing Using Only the Generator Portion of a GAN," Electronics, 2022.
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83
S. Ju, Y. Lee, and S. Lee, "Convolutional Neural Networks With Discrete Cosine Transform Features," IEEE Transactions on Computers, vol. 71, no. 12, pp. 3389-3395, Dec. 2022.
S. Ju, Y. Lee, and S. Lee, "Convolutional Neural Networks With Discrete Cosine Transform Features," IEEE Transactions on Computers, vol. 71, no. 12, pp. 3389-3395, Dec. 2022.
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82
D. Kim, and S. Lee, "Hardware-Efficient Approximate Dividers for Image Processing in WSN Edge Devices," Wireless Sensor Network, 2021.
D. Kim, and S. Lee, "Hardware-Efficient Approximate Dividers for Image Processing in WSN Edge Devices," Wireless Sensor Network, 2021.
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81
D. Kim, and S. Lee, "Approximate Square Root Circuits with Low Latency and Power Dissipation," Electronics, 2021.
D. Kim, and S. Lee, "Approximate Square Root Circuits with Low Latency and Power Dissipation," Electronics, 2021.
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80
K. Kim, and S. Lee, "Algorithms for Finding Vulnerabilities and Deploying Additional Sensors in a Region with Obstacles," Electronics, 2021.
K. Kim, and S. Lee, "Algorithms for Finding Vulnerabilities and Deploying Additional Sensors in a Region with Obstacles," Electronics, 2021.
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79
M. Ha, Y. Byun, S. Moon, Y. Lee, and S. Lee, "Layerwise buffer voltage scaling for energy-efficient convolutional neural network," IEEE Transactions on Computer-Aided Design of Integrated Circuits and
M. Ha, Y. Byun, S. Moon, Y. Lee, and S. Lee, "Layerwise buffer voltage scaling for energy-efficient convolutional neural network," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020.
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78
S. Moon+, Y. Byun+, J. Park, S. Lee, and Y. Lee, "Memory-Reduced Network Stacking for Edge-Level CNN Architecture with Structured Weight Pruning," IEEE Journal on Emerging and Selected Topics in Circu
S. Moon+, Y. Byun+, J. Park, S. Lee, and Y. Lee, "Memory-Reduced Network Stacking for Edge-Level CNN Architecture with Structured Weight Pruning," IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 9, no. 4, pp. 735-746, Dec. 2019. (+: equally contributed to this work)